Unveiling the Origin of Disturbance in FeFET and the Potential of Multifunctional TiO₂ as a Breakthrough for Disturb-Free 3D NAND Cell: Experimental and Modeling

Abstract

We reveal the origin of disturbance issues in ferroelectric FETs (FeFETs) with a metal-gate interlayer (G.IL)-ferroelectric (FE)-channel interlayer (Ch.IL)-Si (MIFIS) stack. To achieve both low-voltage operation and disturbance immunity, we introduce a multi-functional <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> layer, positioned between the G.IL and FE layer. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> multi-functional layer (MFL) serves two pivotal roles: (1) It forms a potential well that captures gate-injected charges, enhancing the memory window (MW). (2) It amplifies the domain size of the underlying FE layer, enabling steep polarization <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\Delta \mathrm{P})$</tex> switching behavior. Under the same operation voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{V}_{\text{op}})$</tex> which is below 15 V, MIFIS FeFET with <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex> improves the MW by 35 % compared to the device without <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{TiO}_{2}$</tex>. Notably, the proposed device remains disturbance-free <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\Delta \mathrm{V}_{\text{th}}\sim 0\ \mathrm{V})$</tex> even after 10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> cycles of 9 V disturbance stress, whereas the Ti<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">O2</inf>- free counterpart experiences severe disturbance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\Delta \mathrm{V}_{\text{th}}\sim 3.5\ \mathrm{V})$</tex> under the same conditions. We attribute this difference to the partial <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \mathrm{P}$</tex> properties of FE layers. Using a model framework which reflects the hysteresis sub-loop of FE, we clarify that partial <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \mathrm{P}$</tex> acts as the primary driver of disturbances, as it precedes charge trapping and accelerates charge injection from the gate. This study highlights the potential of MIFIS FeFET for future NVM applications by decoupling the trade-off between low-voltage operation and disturbance issues.

Topics & Concepts