Pt/Al<sub>2</sub>O<sub>3</sub>/TaO<sub> <i>X</i> </sub>/Ta Self-Rectifying Memristor With Record-Low Operation Current (<2 pA), Low Power (fJ), and High Scalability
Sheng‐Guang Ren, Run Ni, Xiaodi Huang, Yi Li, Kan‐Hao Xue, Xiangshui Miao
Abstract
Self-rectifying memristor (SRM) with high rectification ratio (RR) and nonlinearity (NL) is a superior candidate for 3-D integrated array by effectively tackling the sneak path problem. In this article, we fabricated bilayer Pt/Al<sub>2</sub>O<sub>3</sub>/TaO<inline-formula> <tex-math notation="LaTeX">$_{\!{X}}$ </tex-math></inline-formula>/Ta SRMs with a 250-nm feature size, which show record-low < 2-pA operation current, >10<sup>3</sup> ON-/ OFF-ratio, >10<sup>4</sup> RR, high uniformity, and good retention. The high resistance [low resistance state (LRS): 10<sup>10</sup>–<inline-formula> <tex-math notation="LaTeX">$10^{11} \Omega $ </tex-math></inline-formula>, high resistance state (HRS): ><inline-formula> <tex-math notation="LaTeX">$10^{14} \Omega $ </tex-math></inline-formula>] yields fJ-level switching power consumption. Moreover, the SRMs exhibit superior NL (~10<sup>4</sup>) and ultralow leakage current (~10 fA), leading to a calculated 538-Mbit passive array scalability with the premise of 10% read margin. Detailed mechanism analysis reveals that high RR and NL can be attributed to the high barrier in Pt/Al<sub>2</sub>O<sub>3</sub> and Al<sub>2</sub>O<sub>3</sub>/TaO<inline-formula> <tex-math notation="LaTeX">$_{\!{X}}$ </tex-math></inline-formula> interface, respectively, during the resistive switching process. Our work advances the development of SRMs for high-density passive array and even 3-D integration.