Litcius/Paper detail

A Family of ΔΣ Modulators With High Spur Immunity and Low Folded Nonlinearity Noise When Used in Fractional- Frequency Synthesizers<i/>

Valerio Mazzaro, Michael Peter Kennedy

2022IEEE Transactions on Circuits and Systems I Regular Papers16 citationsDOIOpen Access PDF

Abstract

Phase locked loops for fractional frequency synthesis typically use Digital <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> Modulators (DDSMs) as their divider controllers. Different types and configurations of DDSMs have been presented in the past which have distinctive characteristics in terms of spectral shaping of their quantization errors, spur immunity and implementation costs. This paper presents a family of DDSMs that have provably high spur immunity and low folded noise when used in fractional- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${N}$ </tex-math></inline-formula> frequency synthesizers with polynomial nonlinearities.

Topics & Concepts

NotationNoise immunityQuantization (signal processing)Delta-sigma modulationNoise (video)MathematicsNonlinear systemComputer scienceDiscrete mathematicsAlgorithmEngineeringArithmeticElectronic circuitElectrical engineeringPhysicsTelecommunicationsArtificial intelligenceBandwidth (computing)Image (mathematics)Quantum mechanicsAdvancements in PLL and VCO TechnologiesAnalog and Mixed-Signal Circuit DesignPhotonic and Optical Devices