Stacked ferroelectric heterojunction tunnel field effect transistor on a buried oxide substrate for enhanced electrical performance <sup>*</sup>
Girdhar Gopal, Heerak Garg, Harshit Agrawal, Tarun Varma
Abstract
Abstract The device behavior of a stacked ferroelectric heterojunction tunnel field effect transistor (Fe-HTFET) on a buried oxide substrate is investigated in this paper. Si-doped HfO 2 was taken as the ferroelectric material over an oxide layer (gate dielectric) in a stacked gate configuration. A higher drive current and reduced subthreshold swing (SS) may be achieved using Si-doped HfO 2 that amplifies the gate bias. The effect of various electrical parameters has been investigated by changing the geometric dimensions of the proposed device. The dimensional parameters have been optimized after extensive simulations. The proposed Fe-HTFET simulations and results show that this structure boosts performance significantly and could be considered a good candidate for ultra-low-power applications. To investigate the performance of the proposed Fe-HTFET, two-dimensional simulations have been done using the Sentaurus technology computer-aided design tool.