Design optimization of nanoscale electrothermal transport in 10 nm SOI FinFET technology node
Houssem Rezgui, Faouzi Nasri, Giovanni Nastasi, Mohamed Fadhel Ben Aissa, Salah Rahmouni, Vittorio Romano, Hafedh Belmabrouk, Amen Allah Guizani
Abstract
Abstract A flexible framework is obtained for enhancing both the thermal and electrical performance of fin field-effect transistor (FinFET) technology. Investigation of the nanoscale heat conduction within a short-channel field-effect transistor can be regarded as an emerging challenge related to future-generation transistors. In this work, we report the electrothermal transport in a 10 nm silicon-on-insulator (SOI) FinFET based on the dual-phase-lag model and modified drift-diffusion motions. We found that electron mobility decreases along the channel due to carrier confinement under higher electric field. In addition, the surface detection temperature indicates that the self-heating process is localized between the source and drain region. As promising results, high-κ metal-oxide and lower thermal boundary resistance can optimize the nanoscale heat transport in the SOI FinFET device.