27.2 M0N0: A Performance-Regulated 0.8-to-38MHz DVFS ARM Cortex-M33 SIMD MCU with 10nW Sleep Power
Pranay Prabhat, Benoît Labbe, Graham Knight, Anand Savanth, Jonas Svedas, Matthew Walker, Supreet Jeloka, Philex Ming-Yan Fan, Fernando Garćıa-Redondo, Thanusree Achuthan, James Myers
Abstract
Recent research has shown subthreshold operation to reduce active energy in low-power MCUs [1], [2], [5]. However, some applications impose additional constraints. For battery-powered sensor nodes deployed in remote locations, the MCU may lie dormant for long periods, only waking up when a sensor detects activity. For such cases, the MCU needs very low sleep power to maximize battery lifetime, deterministic real-time response to capture rare sensor events, and energy-efficient operation with enough compute and memory to run useful workloads. This work shows a 65nm Arm Cortex-M33 SoC for constrained battery-powered sensor nodes achieving 10 nW sleep power (4 KB$ retention) with fine-grained DVFS and performance regulation from 0.8 MHz (0.40 V) to 38 MHz (0.75V) to address a range of real-time requirements across the operating range of 0-to-85° C and 1.0-to-1.5V battery voltage. Digital circuit optimizations reduce active power to 47µ W (20pJ/cycle) on a high-activity keyword spotting (KWS) workload.