Review of 3D Networks-On-Chip Simulators and Plugins
Ahmed Abbas Jasim Al-Hchaimi, Wameedh Nazar Flayyih, Fazirulhisyam Hashim, Mohd Shahrizal Rusli, Fakhrul Zaman Rokhani
Abstract
A comprehensive review focuses on 3D network-on-chip (NoC) simulators and plugins while paying attention to the 2D simulators as the baseline is presented. Discussions include the programming languages, installation configuration, platforms and operating systems for the respective simulators. In addition, the simulator’s properties and plugins for design metrics evaluations are addressed. This review is intended for the early career researchers starting in 3D NoC, offering selection guidelines on the right tools for the targeted NoC architecture, design, and requirements.
Topics & Concepts
Plug-inComputer scienceSystem on a chipEmbedded systemChipComputer architectureOperating systemTelecommunicationsInterconnection Networks and SystemsEmbedded Systems Design TechniquesVLSI and Analog Circuit Testing