Universal Chiplet Interconnect Express Г (UCIeГ)
Vik Chaudhry
Abstract
Align Industry around an open platform to enable chiplet based solutions. Enables construction of SoCs that exceed maximum reticle size -Package becomes new System-on-a-Chip (SoC) with same dies (Scale Up) -Reduces time-to-solution (e.g., enables die reuse) -Lowers portfolio cost (product & project) -Enables optimal process technologies -Smaller (better yield) -Reduces IP porting costs -Lowers product SKU cost -Enables a customizable, standard-based product for specific use cases (bespoke solutions) -Scales innovation (manufacturing and process locked IPs)
Topics & Concepts
BespokeReuseInterconnectionPortingProduct (mathematics)Computer scienceManufacturing engineeringEmbedded systemChipProcess (computing)Reliability engineeringEngineeringOperating systemBusinessTelecommunicationsMathematicsSoftwareAdvertisingGeometryWaste management3D IC and TSV technologiesVLSI and Analog Circuit TestingVLSI and FPGA Design Techniques