Dynamic <i>C</i> <sub>GD</sub> and <i>dV/dt</i> in Superjunction MOSFETs
Hyemin Kang, Florin Udrea
Abstract
As the dimensions of the power metalsemiconductor field-effect transistor (MOSFET) are scaling down, and the output capacitance is considerably reduced, the fast dV/dt becomes an issue and can trigger severe oscillations during hard switching. To understand the origin of the dV/dt and the induced gate oscillations, the intricate link between the device operation and the circuit conditions is required. In this article, the dynamic gate-to-drain capacitance, C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GD</sub> , is extracted by employing a five-terminal method. Through the use of simulations, the relationship between C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GD</sub> and the induced gate oscillations is explored. In addition to this, the 2-D depletion behavior in a superjunction system, which affects the dynamic C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GD</sub> , is investigated.