A Compact Model for Interface-Type Self-Rectifying Resistive Memory With Experiment Verification
Jinwoo Kim, Jun-Seok Beom, Hong‐Sub Lee, Nam-Seog Kim
Abstract
A new non-volatile memory, resistive random access memory (RRAM), enables computein- memory (CIM)-based hardware accelerators with improved throughput and energy efficiency, further enabling machine learning instant-on inference at the edge. However, sneak-path currents in RRAM crossbar array (CBA) can cause crosstalk, limiting their high-density applications. Self-rectifying RRAMs (SRR) are the best choice for suppressing leakage currents. The interface-type RRAM provides CMOS compatibility, better controllability, high reliability, and lower power consumption compared to the filament-type. In this paper, for circuit and system exploration, a compact model of interface-type RRAM is developed. The model includes the Schottky barrier diode, effective layer resistance, nano-battery effect, and parasitic resistance and capacitance. Moreover, it has a dynamic behavior model such as device-to-device variation, retention, and endurance. It reproduces a high accuracy of 98.97% on DC and 98.05% on AC compared to the measurements. The proposed model is applied to a neuromorphic 64 × 64 SRR CBA with 32-bit fixedpoint precision. Moreover, nano-battery bias scheme is proposed and reduces the sneak-path current error to 0.02 %. Vector matrix multiplication (VMM) application shows 3.44 TOPS/W with an LRS to HRS ratio of 50:50, and deep neural network (DNN) of VGG-8 architecture with CIFAR-10 datasets observes that 1.36 % accuracy degradation.