Scaled contact length with low contact resistance in monolayer 2D channel transistors
Wen-Chia Wu, Terry Y.T. Hung, D. Mahaveer Sathaiya, Dongxu Fan, Goutham Arutchelvan, Chen-Feng Hsu, Sheng‐Kai Su, Ang Sheng Chou, Edward Chen, Weisheng Li, Zhihao Yu, Hao Qiu, Ying-Mei Yang, Kuang-I Lin, Yun-Yang Shen, Wen‐Hao Chang, San Lin Liew, Vincent Hou, Jin Cai, Chung-Cheng Wu, Jeff Wu, H.‐S. Philip Wong, Xinran Wang, Chao-Hsin Chien, Chao-Ching Cheng, Iuliana Radu
Abstract
Two-dimensional transition metal dichalcogenides (2D TMDs) are expected to enable extremely scaled logic transistors for their ultrathin body and superior electrostatic control, i.e. gate length scaling. Aggressive scaling requires also contact length scaling. Here we demonstrate contact length scaling with low contact resistance of sub-100 Ω-μm (best data in TLM) through optimized surface preparation and semimetal/metal stack. Monolayer-MoS <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> channel transistors have the same driving current at contact length down to 30 nm. A calibrated TCAD model which captured device trends is used to extrapolate to ~250 Ω-μm at sub-15nm contact length per nanosheet of MoS <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> .