Layered Semiconducting 2D Materials for Future Transistor Applications
Sheng‐Kai Su, Chih‐Piao Chuu, Mingyang Li, Chao-Ching Cheng, H.‐S. Philip Wong, Lain‐Jong Li
Abstract
Down‐scaling of transistor size in the lateral dimensions must be accompanied by a corresponding reduction in the channel thickness to ensure sufficient gate control to turn off the transistor. However, the carrier mobility of 3D bulk semiconductors degrades rapidly as the body thickness thins down due to more pronounced surface scattering. Two‐dimensional‐layered materials with perfect surface structures present a unique opportunity as they naturally have atomically thin and smooth layers while maintaining high carrier mobility. To benefit from continuous scaling, the performance of the scaled 2D transistors needs to outperform Si technology nowadays. There are already quite a few reviews discussing on the material property of potential 2D materials. It is believed that rigorous analysis based on industrial perspectives is needed. Herein, an analysis on channel material selection is presented and arguments on the four selected 2D semiconductors are provided, which can possibly meet the needs of future transistors, including WS 2 , SnSe, PtSe 2 , and InSe. The challenges and recent related research progresses for each material are also discussed.