11.10 A 12V-lnput 1V-1.8V-Output 93.7% Peak Efficiency Dual-Inductor Quad-Path Hybrid DC-DC Converter
Wen‐Liang Zeng, Guigang Cai, Chon-Fai Lee, Chi‐Seng Lam, Yan Lu, Sai‐Weng Sin, Rui P. Martins
Abstract
A high-efficiency <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$12\mathrm{V}$</tex> -input <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1\mathrm{V}-1.8\mathrm{V}$</tex> -output DC-DC converter with wide output current range is highly desirable in energy-efficient portable devices (e.g., laptops) and automotive applications. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{In}$</tex> such applications, the considerably small duty ratio <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{D}(\mathrm{D} < 0.1)$</tex> and power switches' high voltage stress of the conventional buck converter brings significant efficiency penalty (Fig. 11.10.1, top left). Both industry and academia have developed many hybrid DC-DC converter topologies to overcome these problems [1–6]. The double step-down (DSD) converter, shown in Fig. 11.10.1 (top right), is the most popular solution [2–4] for this application. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{In}$</tex> the DSD converter, the flying capacitor <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{\mathrm{F}}$</tex> sustains half of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{IN}}$</tex> , relaxing the voltage stress of the switches to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{IN}}/2$</tex> and enlarging the duty ratio D. However, the two inductors must provide all the output current, thus leading to a large inductor DCR loss. To reduce such loss, [5] proposed a dual-path hybrid buck <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(2\text{PHB})$</tex> converter (Fig. 11.10.1, bottom left), in which the flying capacitor <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{\mathrm{F}}$</tex> sustains the voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{OUT}}$</tex> and provides an additional output current path. However, the small duty ratio and switches' high voltage stress problems are still significant in the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2\text{PHB}$</tex> converter. To further enlarge the duty ratio and reduce the voltage stress of the switches, this paper proposes a dual-inductor quad-path hybrid buck <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(2\mathrm{L}4\text{PHB})$</tex> converter, as presented in Fig. 11.10.1 (bottom right). The 2L4PHB inherits the strengths of DSD and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2\text{PHB}$</tex> converter topologies, where the flying capacitor <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{\mathrm{F}0}$</tex> sustains half of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{IN}}$</tex> , thus relaxing the voltage stress of the switches. <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{In}$</tex> addition, both <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{\mathrm{F}1}$</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{C}_{\mathrm{F}2}$</tex> sustain the voltage <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{OUT}}$</tex> and provide additional output current paths, subsequently further reducing the inductor DCR loss. Among the structures shown in Fig. 11.10.1, it has the largest <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{D} ($</tex> VCR <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$=\mathrm{D}/2(1+\mathrm{D})$</tex> , VCR <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$< 1/6)$</tex> , the smallest average inductor current <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{i}_{\text{L,avg}}=\mathrm{i}_{\text{Load}}/2(1+\mathrm{D}))$</tex> , and the smallest voltage stress of the switches <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{V}_{\mathrm{X}1,2}=0\ \text{or}\ \mathrm{V}_{\text{IN}}/2-\mathrm{V}_{\text{OUT}})$</tex> when compared with the different topologies mentioned above. Furthermore, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2\mathrm{L}4\text{PHB}$</tex> also owns inherent inductor current balance characteristic.