A Study on the Performance of AlGaN/GaN HEMTs Regrown on Mg-Implanted GaN Layers With Low Channel Thickness
Philipp Döring, Matthias Sinnwell, Stefan Müller, Heiko Czap, R. Driad, Peter Brückner, K. Köhler, Lutz Kirste, M. Mikulla, R. Quay
Abstract
In this work, a comprehensive study on the performance of AlGaN/GaN high-electron-mobility transistors (HEMTs) regrown on Mg-implanted layers is shown. A comparably sharp doping profile into regrown AlGaN/GaN-stacks was verified by secondary-ion mass spectrometry (SIMS) even at standard metal–organic chemical vapor deposition (MOCVD) temperatures above 1000 °C. Static and dynamic characterization by a full 100-mm wafer map exhibited neither an impact on the threshold voltage, transconductance nor on the saturation current even for channel thicknesses as low as 150 nm. Slight current collapse was observed at high OFF-state conditions with large recovery times above 5 s indicating rather slow traps from the nonconnected p-GaN. Within the leakage current, three different mechanisms were identified across the vertical epi-stack. While variable-range hopping (VRH) dominates below <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{{\text {DS}}}$ </tex-math></inline-formula> = 35 V, the Pool–Frenkel emission (PFE) was identified for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{{\text {DS}}} >35$ </tex-math></inline-formula> V. At high electric fields ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E} >$ </tex-math></inline-formula> 1 MV/cm), the devices revealed either a direct change from PFE to drain-induced barrier lowering (DIBL) or a change from PFE to space-charge-limited currents (SCLCs) to DIBL was observed. The device results demonstrate the feasibility of the demonstrated process for reproducible device fabrication on large-scale wafers with low channel thicknesses for future device developments of CAVETs, SJ-HEMTs, p-GaN back gates, and intrinsic body diodes.