Robust Avalanche in 1.7 kV Vertical GaN Diodes With a Single-Implant Bevel Edge Termination
Ming Xiao, Yifan Wang, Ruizhe Zhang, Qihao Song, Matthew Porter, E.P. Carlson, Kai Cheng, Khai D. T. Ngo, Yuhao Zhang
Abstract
This work demonstrates a novel junction termination extension (JTE) with a graded charge profile for vertical GaN p-n diodes. The fabrication of this JTE obviates GaN etch and requires only a single-step implantation. A bi-layer photoresist is used to produce an ultra-small bevel angle ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sim 0.1^{\text {o}}{)}$ </tex-math></inline-formula> at the sidewall of a dielectric layer. This tapered dielectric layer is then used as the implantation mask to produce a graded charge profile in p-GaN. The fabricated GaN p-n diodes show a breakdown voltage (BV) of 1.7 kV (83% of the parallel-plane limit) with positive temperature coefficient, as well as a high avalanche current density over 1100 A/cm2 at BV in the unclamped inductive switching test. This robust avalanche is ascribed to the migration of the major impact ionization location from the JTE edge to the main junction. This single-implant, efficient, avalanche-capable JTE can potentially become a building block of many vertical GaN devices, and its fabrication technique has wide device and material applicability.