Circuit Proposal of a Latching Current Limiter for Space Applications Based on a SiC N-MOSFET
Abraham López, Pablo F. Miaja, Manuel Arias, A. Fernández
Abstract
Latching current limiters (LCLs) provide individual overcurrent protection to payloads protecting the satellite power bus. Under an overload, they limit the maximum current for a certain time. After this time, if the failure persists, the LCL isolates it from the power bus. The keystone of the LCLs is the current-limiting transistor. In traditional LCL designs, P-MOSFETs are used as the main current-limiting device. However, in this work, a complete LCL based on N-MOSFETs is presented. This change involves a complete redesign of the control circuitry of the LCL architecture. The use of silicon carbide (SiC) is explored to assess the possibility of operating at higher voltages and potentially at higher temperatures. This article shows a complete LCL design based on a SiC N-MOSFET. The design is tested implementing a class 10 LCL (10 A as nominal current) for a bus voltage of 100 V, a limitation current of 12 A, and a limitation time (trip-OFF time) of 1.5 ms.