Analytical Modeling of Cryogenic Subthreshold Currents in 22-nm FDSOI Technology
Hung-Chi Han, Zhixing Zhao, Steffen Lehmann, Edoardo Charbon, Christian Enz
Abstract
The transistor compact model is crucial but has yet to mature for cryogenic electronics. This paper presents a sophisticated analytical model of the MOSFET subthreshold current at cryogenic temperatures, accounting for the thermionic, hopping, source-to-drain tunneling transports, and the Gaussian-distributed interface traps to bridge the gap. Hopping and source-to-drain tunneling transports can co-exist in the subthreshold regime, leading to subthreshold saturation strongly correlated to channel length and drain voltages.
Topics & Concepts
Subthreshold conductionThermionic emissionSubthreshold slopeQuantum tunnellingMOSFETTransistorOptoelectronicsDrain-induced barrier loweringElectrical engineeringElectronicsMaterials scienceThreshold voltageVoltagePhysicsEngineeringElectronQuantum mechanicsAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devicesSilicon Carbide Semiconductor Technologies