Van der Waals Ferroelectric CuCrP<sub>2</sub>S<sub>6</sub>‐Enabled Hysteresis‐Free Negative Capacitance Field‐Effect Transistors
Han Chen, Yinfeng Long, Shiyu Zhang, Kai Liu, Mingfeng Chen, Jinxiu Zhao, Mengwei Si, Lin Wang
Abstract
Abstract The relentless pursuit of miniaturization and reduced power consumption in information technology demands innovative device architectures. Negative capacitance field‐effect transistors (NC‐FETs) offer a promising solution by harnessing the negative capacitance effect of ferroelectric materials to amplify gate voltage and achieve steep subthreshold swings (SS). In this work, 2D van der Waals (vdW) ferroelectric CuCrP 2 S 6 (CCPS) is employed as the gate dielectric to realize hysteresis‐free NC‐FETs technology. Scanning microwave impedance microscopy (sMIM) is employed to investigate the dielectric property of CCPS, revealing a thickness‐independent dielectric constant of ≈35. Subsequently, NC‐FETs are fabricated with MoS 2 channel, and the capacitance matching conditions are meticulously investigated. The optimized devices exhibit simultaneously ultra‐steep SS (≈12 mV dec −1 ) and negligible hysteresis, with immunity to both voltage scan range and scan rate. Finally, a resistor‐loaded inverter is demonstrated manifesting a low operation voltage down to 0.2 V and hysteresis‐free transfer characteristics. This work paves the way for the development of high‐performance, low‐power electronics by exploiting 2D vdW ferroelectric materials.