Advanced RDL Interposer PKG Technology for Heterogeneous Integration
Jae-gwon Jang, Kyoung-Lim Suk, Seokhyun Lee, Jin-woo Park, Gwang‐Jae Jeon, Jung-ho Park, Jeong-gi Jin, Su-chang Lee, Gyoungbum Kim, Joo-yeon Choi, Kim Dae-Woo, Dan Oh, Won-Kyoung Choi
Abstract
As faster data processing and communication gets more demanded for Data Center/Cloud, HPC (High Performance Computing), AI (Artificial Intelligence) accelerator and Network markets, HBM (High Bandwidth Memory) becomes main memory type to meet the required bandwidth performance. HBM integration with logic dies in a system level has been developed on 2.5D SiP (System in Package) Platform with Si Interposer having TSV (Through Silicon Vias) of which fabrication cost is rather high. Therefore, as the low cost solution, alternative 2.5D SiP Platform approaches such as Organic Interposer using Redistribution Layer (RDL) and Glass Interposer have recently been reported. In this paper, RDL Interposer package with 4 HBM and 1 logic is demonstrated as 2.5D package platform based on RDL-First Fan-out Wafer Level Package (FOWLP). The effect of RDL design factors on electrical performances is investigated using the eye diagram method and fine pitch multi-layer RDL structure (2um L/S RDL, 4 Layers) is designed accordingly. Fine pitch RDL process is established followed by the wafer level and unit level assembly processes and RDL Interposer package is confirmed to meet all the reliability requirements.