Characterization and optimization of junctionless gate-all-around vertically stacked nanowire FETs for sub-5 nm technology nodes
V. Bharath Sreenivasulu, Narendar Vadthiya
Topics & Concepts
NanowireMaterials scienceOptoelectronicsField-effect transistorTransistorElectrical engineeringVoltageEngineeringAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devicesNanowire Synthesis and Applications