Step-by-Step Development and Implementation of FS-MPC for a FPGA-Based PMSM Drive System
Ipsita Mishra, Ravi Nath Tripathi, Vijay Kumar Singh, Tsuyoshi Hanamoto
Abstract
In this paper, finite-set model-predictive control (FS-MPC) is inducted for a motor drive system. The dynamic response and multiple constraint handling nature of FS-MPC are the major factors that stand out among the controller family. However, for real-time implementation, the computational burden of FS-MPC is a primary concern. Due to the parallel processing nature and discrete nature of the hardware platform, the field-programmable gate array (FPGA) can be an alternative solution for the real-time implementation of the controller algorithm. The FPGA is capable of handling the computational requirements for FS-MPC implementation; however, the system development involves multiple steps that lead to a time-consuming debugging process. Moreover, specific hardware coding skill makes it more complex, corresponding to an increase in system complexity, which leads to a tedious task for the system development. This paper presents a FPGA-based implementation of the predictive current control of a permanent magnet synchronous motor (PMSM). FS-MPC of the PMSM drive system is designed and implemented using the digital model integration approach provided by the Xilinx system generator (XSG) and VIVADO platform. The step change in the load disturbance as well as the reference speed is considered for the analysis of the controller for the motor drive system. Moreover, the steady state error and harmonic distortion in the motor current is considered for an in-depth analysis of the system performance corresponding to different sampling frequencies.