Complete Avalanche Process and Failure Mechanism of Trench-Gate FS-IGBT Under Unclamped Inductive Switching by Using Infrared Visualization Method
Xin Tong, Siyang Liu, Weifeng Sun, Jianhui Wu
Abstract
The complete avalanche process of the trench-gate filed-stop insulated gate bipolar transistor (FS-IGBT) is first investigated based on an infrared visualization technology called step-control infrared thermography method. By this method, the details about the generation, movement, and accumulation of the heat can be monitored during the entire avalanche process, and a new avalanche weak spot of the trench-gate FS-IGBT has been found. It shows that the heat generation takes place not only in the cell region but also at the termination with the increasing avalanche time. The termination region exhibits the highest lattice temperature in the end due to poor heat dissipation. Therefore, the cells close to the termination have much higher p-base resistances due to the high lattice temperature, which results in the triggering of the parasitic n-p-n transistors in these areas. The infrared visualization method can also be extended to other power devices for avalanche research works.