Digital Versus Analog Artificial Intelligence Accelerators: Advances, trends, and emerging designs
Jae-sun Seo, Jyotishman Saikia, Jian Meng, Wangxin He, Han-Sok Suh, Anupreetham Anupreetham, Yuan Liao, Ahmed Hasssan, Injune Yeo
Abstract
For state-of-the-art artificial intelligence (AI) accelerators, there have been large advances in both all-digital and analog/mixed-signal circuit-based designs. This article presents a practical overview and comparison of recent digital and analog AI accelerators. We first introduce hardware-efficient AI algorithms, which have been targeted for many AI hardware designs. Next, we present a survey of 1) all-digital AI accelerators, including designs with new dataflow, low precision, and sparsity, and 2) analog/mixed-signal AI accelerators featuring switch-capacitor circuits and in-memory computing (IMC) with ADCs. Recent advances of AI accelerators in both digital and analog design approaches are summarized, and emerging AI accelerator designs are discussed.