A CMOS Band-Pass Low Noise Amplifier with Excellent Gain Flatness for mm-Wave 5G Communications
Han‐Woong Choi, Sunkyu Choi, Choul‐Young Kim
Abstract
This paper presents a two-stage 24–32 GHz low-noise amplifier (LNA) with excellent gain flatness for wide bandwidth communication applications. A new band-pass type 2-stage common-source (CS) LNA configuration using the pole-tuning technique that actively exploits the parasitic capacitance of a CMOS device is proposed for bandwidth extension with low in-band gain variation. To demonstrate the feasibility of the proposed circuit configuration, a wideband LNA is implemented using a 65-nm CMOS process. The LNA shows a gain variation of ±0.19 dB in frequency band of 24 to 32 GHz with a peak gain of 18.64 dB and a noise figure of 2.27 dB while consuming 10.0 rnA from a 1V supply. The core circuit occupies an area of 0.23 × 0.43 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .