4.3 A 76.7fs-lntegrated-Jitter and −71.9dBc In-Band Fractional-Spur Bang-Bang Digital PLL Based on an Inverse-Constant-Slope DTC and FCW Subtractive Dithering

Abstract

Ultra-low-jitter and high-spectral-purity frequency synthesizers are key building blocks for high-performance wireless transceivers and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{FMCW}$</tex> radars. A bang-bang <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{PLL} (\text{BBPLL}$</tex> ) is an attractive solution thanks to its small footprint and low power consumption; however, its operation in the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{fractional-N}$</tex> mode is hindered by the large quantization error <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\text{Q-error})$</tex> I caused by the non-integer frequency multiplication saturating the narrow input range of the bang-bang phase detector <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\text{BBPD})$</tex> . A digital-to-time converter <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\text{DTC})$</tex> is typically used to cancel the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{Q-error}$</tex> in time domain [1] (Fig. 4.3.1 top-left). Unfortunately, the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{DTC}$</tex> non-linearity can generate significant fractional spurs, thus corrupting the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{PLL}$</tex> spectral purity and integrated jitter. Solutions to this problem rely on either improving the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{DTC}$</tex> linearity or adopting a suitable randomization of the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{Q-error}$</tex> sequence to generate lower spurs in the presence of the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{DTC}$</tex> non-linearity. The constant slope <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{DTC} (\text{CS-DTC})$</tex> achieves superior linearity among <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{DTC}$</tex> architectures [2], even if further improvements are limited by the voltage sensitivity of current generators <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\text{CGs})$</tex> and parasitic capacitances as well as by the non-linearity of the digital-to-analog converter <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\text{DAC})$</tex> adopted in the circuit. On the other hand, those randomization techniques to reduce spurs typically require a larger <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{Q-error}$</tex> range [3], [4] that increases <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{PLL jitter}$</tex> for two reasons: the higher quantization-noise power and the larger random jitter induced by the wider range needed for the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{DTC}$</tex> . This work introduces a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$9.25-\text{to}-10.5\text{GHz} \text{fractional-N BBPLL}$</tex> achieving <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$-71.9\text{dBc}$</tex> fractional spur and a total rms jitter (including spurs) of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$76.7\text{fs}$</tex> at near-integer channels leveraging: <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\mathrm{i})$</tex> a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{DTC}$</tex> architecture (denoted as <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$inverse constant-slope DTC)$</tex> I overcoming the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{CS-DTC}$</tex> limitations and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(\text{ii})$</tex> a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{Q-error}$</tex> randomization technique (denoted as <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$FCW$</tex> subtractive dithering), which keeps the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{Q}- \text{error}$</tex> range constant thus not degrading <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{PLL jitter}$</tex> .

Topics & Concepts