Threshold Voltage Adjustment on 4H-SiC MOSFETs Using P-Doped Polysilicon as a Gate Material
Alexander May, Mathias Rommel, Affan Abbasi, Tobias Erlbacher
Abstract
To scale digital circuits, symmetric threshold voltages (V th ) for n-type transistors (NMOS) and p-type transistors (PMOS) are important. One step towards this in silicon carbide (SiC) is selecting a p-doped polysilicon (pPolySi). This implementation has been shown in this work with V th being evaluated by five different methods. Furthermore, operating temperatures up to 500 °C and their impact on V th were investigated. It has been successfully demonstrated that elevated temperature shifts V th of both transistor types towards 0 V, whereas changing the gate electrode from n-doped PolySi (nPolySi) to pPolySi shifts V th of both transistor types to more positive values. Both effects are complementary for the PMOS, reaching V th below 4 V.