AES Algorithm with Dynamic Shift Rows and Bit Permuted Mix Column
J R Navneet, R. M. Patil, Omkar Sawant, Sridhar Madasamy, R. Sakthivel
Abstract
In today's digitally interconnected world, necessity of data perseverance has grown, reaching far and wide and AES algorithm is the key to it. Essence of AES algorithm lies in its operations like Sbox generation, mix column and shift rows, Key functionalities of these blocks are modified in this work. Sbox generation had been carried out with pseudo random sequence generator, an external parity signal logic had been implemented to determine the shift rows operation to enhance robustness. Higher computations in mix column transformation leads to increase in power consumption, in order to reduce it, an efficient bit permutation technique has been implemented in place of mix column and significant reduction in area is observed. Around <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$55\%$</tex> of avalanche effect has been observed in proposed AES algorithm making it insusceptible to attacks. The logical synthesis is performed for the modified AES algorithm and the results are compared with typical AES algorithm. A remarkable improvement is achieved in the context of area and power.