Gate Leakage and Reliability of GaN -Channel FET With SiNₓ/GaON Staggered Gate Stack<i/>
Li Zhang, Zheyang Zheng, Wenjie Song, Tao Chen, Sirui Feng, Junting Chen, Mengyuan Hua, Kevin J. Chen
Abstract
<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${p}$ </tex-math></inline-formula> -channel GaN field-effect transistors (FETs) with a SiNx/GaON gate stack have been demonstrated with enhanced stability within a wide range of voltage bias and temperature. In this letter, the gate leakage characteristics and reliability of this unconventional staggered gate stack are investigated. At relatively low gate voltages, the gate current is suppressed owing to the buried-channel structure and the presence of GaON that presents an effective hole barrier. With more negative gate biases, the gate leakage was found to be dominated by the transport of holes that spillover from the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${p}$ </tex-math></inline-formula> -channel through the SiNx via Poole-Frenkel emission. Based on this gate leakage mechanism at large gate bias, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sqrt {{\mathrm {E}}} $ </tex-math></inline-formula> model was used for gate lifetime prediction. The maximum applicable ON-state gate voltage of −7.3 V is obtained for a 10-year lifetime with a 1% gate failure rate.