Study of Vertical Ga <sub>2</sub> O <sub>3</sub> FinFET Short Circuit Ruggedness using Robust TCAD Simulation
Albert Lu, Adam Elwailly, Yuhao Zhang, Hiu Yung Wong
Abstract
In this paper, the short circuit ruggedness of Gallium Oxide (Ga 2 O 3 ) vertical FinFET is studied using Technology Computer-Aided-Design (TCAD) simulations. Ga 2 O 3 is an emerging ultra-wide bandgap material and Ga 2 O 3 vertical FinFET can achieve the normally-off operation for high voltage applications. Ga 2 O 3 has a relatively low thermal conductivity and, thus, it is critical to explore the design space of Ga 2 O 3 vertical FinFETs to achieve an acceptable short-circuit capability for power applications. In this study, appropriate TCAD models and parameters calibrated to experimental data are used. For the first time, the breakdown voltage simulation accuracy of Ga 2 O 3 vertical FinFETs is studied systematically. It is found that a background carrier generation rate between 10 5 cm −3 s −1 and 10 12 cm −3 s −1 is required in simulation to obtain correct results. The calibrated and robust setup is then used to study the short circuit withstand time (SCWT) of an 800 V-rated Ga 2 O 3 vertical FinFET with different inter-fin architectures. It is found that, due to the high thermal resistance in Ga 2 O 3 , to achieve an SCWT >1 μ s, low gate overdrive is needed which increases R on,sp by 66% and that Ga 2 O 3 might melt before the occurrence of thermal runaway. These results provide important guidance for developing rugged Ga 2 O 3 power transistors.