5.85-mW 3.1–23.7-GHz Two-Stage CMOS VGA With 2.53-dB NF Using Concurrent Current Steering<sub/>
Jin‐Fa Chang, Yo‐Sheng Lin
Abstract
A low-power and low noise-figure (NF) 3.1–23.7-GHz CMOS variable-gain amplifier (VGA) is presented. The VGA composes of a complimentary common-source (CCS) first stage, followed by a common-source (CS) second stage. Low power and NF and wideband <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$S_{11}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$S_{21}$ </tex-math></inline-formula> are achieved due to the current-reused CCS input stage with multiple inductive impedance matching and gain compensation. A large gain tuning range (with low NF) is achieved due to the concurrent gate–voltage tuning (or current steering) of the first and the second stages. The VGA consumes 5.85 mW (at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {ctrl}}$ </tex-math></inline-formula> of 1 V) and achieves excellent 3-dB bandwidth ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$f_{3\,\mathrm {dB}}$ </tex-math></inline-formula> ) of 20.6 GHz (3.1–23.7 GHz), maximum <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$S_{21}$ </tex-math></inline-formula> of 11.9 dB, minimum NF (NFmin) of 2.53 dB, average NF (NFavg) of 3.97 dB, small group delay (GD) variation of ±16.5 ps, and input third-order intercept point (IIP3) of −6.5 dBm. Moreover, the VGA achieves a decent gain tuning range of 23.4 dB (−5.4 to 18 dB) for <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$V_{\mathrm {ctrl}}$ </tex-math></inline-formula> of 0.6–1.6 V. The chip area is 0.364 mm2.