RaM-SAR: A Low Energy and Area Overhead, 11.3fJ/conv.-step 12b 25MS/s Secure Random-Mapping SAR ADC with Power and EM Side-channel Attack Resilience
Ruicong Chen, Hanrui Wang, Anantha P. Chandrakasan, Hae-Seung Lee
20222022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)21 citationsDOI
Abstract
This paper presents RaM-SAR, a 12b 25MS/s 11.3fJ/conv.-step secure random-mapping SAR ADC with power and EM side-channel attack resilience. Each conversion is randomly mapped to one of the thousands of conversion sequences to randomize power supply traces. This technique protects against neural network based power and EM side-channel attacks. It enables protection with much lower energy and area overheads compared to the prior works. A prototype in 65nm CMOS demonstrates significant improvements with 12.5× higher bandwidth and 4.8× better energy-efficiency over prior works.
Topics & Concepts
Side channel attackComputer scienceOverhead (engineering)Resilience (materials science)Bandwidth (computing)Efficient energy usePower (physics)CMOSChannel (broadcasting)Energy (signal processing)Successive approximation ADCElectronic engineeringEmbedded systemReal-time computingComputer networkElectrical engineeringEngineeringCryptographyVoltageCapacitorAlgorithmPhysicsQuantum mechanicsThermodynamicsOperating systemPhysical Unclonable Functions (PUFs) and Hardware SecurityCryptographic Implementations and SecurityQuantum-Dot Cellular Automata