3D Stackable CNTFET/RRAM 1T1R Array with CNT CMOS Peripheral Circuits as BEOL Buffer Macro for Monolithic 3D Integration with Analog RRAM-based Computing-In-Memory

Abstract

In this work, for the first time, we present a fully functional 3D stackable 1kb one-CNTFET-one-RRAM (1T1R) array with carbon nanotube (CNT) CMOS peripheral circuits. The 1T1R cells were fabricated with 1024 CNT NFETs and Ta <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> O <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</inf> -based multi-bit RRAMs, while the peripheral circuits consisted of 747 CNT PFETs and 875 NFETs for the word line (WL) 7:128 decoder and 128 drivers. The entire array was fabricated using a low-temperature (≤300°C) process, enabling multiple layers of CNTFET/RRAM arrays to be vertically stacked in the BEOL to boost the integration density and chip functionality. Furthermore, this 1T1R digital memory array was then used as a BEOL buffer macro and monolithically 3D (M3D) integrated with another 128kb HfO <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> -based analog RRAM array and Si CMOS logic to accelerate the computing-in-memory (CIM). The fabricated M3D-CIM chip consisted of three functional layers, whose structural integrity and proper function was validated by extensive structural analysis and electrical measurements. To highlight the advantages of this M3D-CIM architecture, typical neural networks such as multi-layer perceptron (MLP) and ResNET32 were implemented, achieving a GPU-equivalent classification accuracy of up to 96.5% in image classification tasks while consuming 39× less energy. Therefore, this work demonstrates the tremendous potential of the CNT/RRAM-based M3D-CIM architecture for various artificial intelligence (AI) applications.

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