Design and implementation of low power and high speed multiplier using quaternary carry look-ahead adder
V. S. Muralidharan, Navnish Kumar
Topics & Concepts
AdderCarry-save adderMultiplier (economics)Serial binary adderComputer scienceCMOSDigital signal processingBinary numberVery-large-scale integrationArithmeticComputer hardwareCarry (investment)Propagation delayLogic gateElectronic engineeringMathematicsAlgorithmEmbedded systemEngineeringEconomicsComputer networkFinanceMacroeconomicsLow-power high-performance VLSI designAnalog and Mixed-Signal Circuit DesignQuantum-Dot Cellular Automata