Multi-Phase Clock Generation for Phase Interpolation With a Multi-Phase, Injection-Locked Ring Oscillator and a Quadrature DLL
Zhaowen Wang, Yudong Zhang, Yuka Onizuka, Peter R. Kinget
Abstract
We present a high-accuracy, low-jitter, multi-phase clock generator (MPCG) based on a multi-phase, injection-locked ring oscillator (MPIL-ROSC) with a quadrature delay-locked loop (QDLL). The QDLL tunes the ring oscillator (ROSC) self-oscillation frequency ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${f}_{{0}}$ </tex-math></inline-formula> ) and provides it with multi-phase injection signals. The proposed architecture breaks the intrinsic tradeoff between jitter and phase accuracy in two-phase injection-locked ROSCs. The MPCG’s eight-phase output clock drives a 7-bit phase interpolator (PI) for phase and frequency deskew. A 1.2-V 65-nm CMOS MPCG prototype chip has a better-than-1° eight-phase accuracy and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$58.8~\mathrm {fs}_{\mathrm {rms}}$ </tex-math></inline-formula> jitter (integrated from 100 kHz to 1 GHz), while consuming 15.6 mW at 7 GHz, yielding a −252.7-dB figure of merit ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mathrm {FOM}_{\mathrm {jitter}}$ </tex-math></inline-formula> ). The peak-to-peak integral nonlinearity (INL) and the peak-to-peak differential nonlinearity (DNL) of the PI are less than 1.9 and 1.2 LSB, respectively, across a frequency range from 5 to 8 GHz.