A Review of Hot Carrier Degradation in n-Channel MOSFETs—Part II: Technology Scaling
Souvik Mahapatra, Uma Sharma
Abstract
Transistor parametric drift due to conduction mode hot carrier degradation (HCD) is reviewed. The time kinetics in n-channel MOSFETs and FinFETs is analyzed for channel length (LCH) variation from ~2 μm to ~20 nm and oxide thickness (TOX) scaling from 20 to 1 nm, for drain bias (VD) variation from ~8 to ~1 V, and gate bias (VG) chosen to achieve a maximum HCD for a particular type of device. The time kinetics shape variation from long-channel heavily doped abrupt junction devices through moderately long-channel lightly doped drain (LDD) devices to short channel devices featuring moderately doped source-drain extensions (SDEs) is reviewed. The temperature (T ) dependence of HCD and the comparison of dc and ac HCD stress kinetics are reviewed in long L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CH</sub> at high VD and in short L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CH</sub> at low V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">D</sub> stress. The observed data are qualitatively explained.