A 0.033-mm<sup>2</sup> 21.5-aF to 114.9-aF Resolution Continuous-Time Δ Σ Capacitance-to-Digital Converter Achieving Parasitic Capacitance Immunity Up to 480 pF
Hyeyeon Lee, Changuk Lee, Inhee Lee, Youngcheol Chae
Abstract
This article presents a continuous-time (CT) delta–sigma ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> ) capacitance-to-digital converter (CDC) intended for use in applications with high capacitance resolution (tens of aF), and a large parasitic capacitance <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{P}$ </tex-math></inline-formula> ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$>$ </tex-math></inline-formula> 400 pF). It consists of a current conveyor (CC) front-end and a CT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> modulator. The CC-based front-end isolates <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{P}$ </tex-math></inline-formula> from the first integrator of the modulator, and the CC’s output current is directly coupled to the CT <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta \Sigma $ </tex-math></inline-formula> modulator. The CC uses a class-AB configuration, which enables to maintain energy efficiency and its capacitance resolution even with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{P}$ </tex-math></inline-formula> . The proposed CDC is fabricated in a 110-nm CMOS process and occupies only 0.033 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . It achieves a capacitance resolution of 21.5–59 aF with an input range of 0.2–1.5 pF. This corresponds to an effective resolution of 14.3 bits in a conversion time of 1.2 ms, while drawing only 120 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{W}$ </tex-math></inline-formula> from a 1.5-V supply. It also achieves a capacitance resolution of 119.4 aF with <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{P}$ </tex-math></inline-formula> of 480 pF, offering robust capacitance resolution with external noise interference (10 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {PP}}$ </tex-math></inline-formula> ).