An improved methodology for extracting interface state density at Si3N4/GaN
Wenjian Liu, Islam Sayed, Chirag Gupta, Haoran Li, S. Keller, Umesh K. Mishra
Abstract
In this Letter, a series of metal-insulator-semiconductor capacitors consisting of Si3N4 dielectrics with different thicknesses on GaN have been fabricated to investigate their interface states. The measurement value extracted from ultraviolet assisted capacitance-voltage methods can be explained by the existence of spatially uniform hole traps in Si3N4. An improved model combining the effects from interface states and hole traps in Si3N4 is proposed to extract the interface state density (Dit) accurately. Based on the model, Dit can be obtained by extrapolating the trap density to a zero-thickness dielectric. The extracted average Dit value of the Si3N4/GaN interface is ∼3.8 × 1011 cm−2 eV−1, and the hole trap concentration in Si3N4 is ∼3.1 × 1018 cm−3. The results, model, and analysis presented here provide new insights into studying Dit of various dielectrics on GaN and other wide-bandgap semiconductors.