32–36-GHz Single-Chip Front-End MMIC Featuring 35-dBm Output Power and 3.2-dB Noise Figure With 60- and 100-nm GaN/Si HEMTs
Patrick E. Longhi, Lorenzo Pace, Ferdinando Costanzo, Walter Ciccognani, Sergio Colangeli, Rocco Giofrè, Rémy Leblanc, Andrea Suriani, Fabio Vitobello, Ernesto Limiti
Abstract
The design, realization, and test of a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$Ka$</tex-math> </inline-formula> -band gallium nitride (GaN) monolithic microwave-integrated circuit (MMIC) single-chip front-end (SCFE) is presented. The MMIC, realized in OMMIC’s 100-and 60-nm gate length GaN on Silicon process, integrates high-power and low-noise amplification together with transmit or receive selection switches in a 4.7 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$</tex-math> </inline-formula> 3.0 mm chip area. The SCFE is conceived for active electronically scanned antenna applications operating from 32 to 36 GHz. In RX mode, a typical noise figure of 3.2 dB and gain better than 3B have been measured. In TX mode, the typical output power and the power-added efficiency (PAE) are 35 dBm and 16%, respectively. A drain bias point trade-off analysis is performed so the power amplifier’s transistors channel temperature remains below 160 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{\circ}$</tex-math> </inline-formula> while design charts are provided for the synthesis of the low-noise amplifier (LNA) block. Finally, 100-and 60-nm gate length transistors are combined on the MMIC to improve its performance in terms of receive noise figure and transmit gain and output power. To the best of the authors’ knowledge, this GaN SCFE features the highest operating frequency reported in the open literature regarding integrated GaN/Si solutions and compares well with GaN/SiC MMICs especially considering the CW test condition here reported while concurrently fulfilling the FET’s channel temperature requirement.