A Reduced Switch Count, Self-Balanced, 13-Level Inverter Based on a Dual T-Type Configuration
S. Foti, T. Scimone, A. Oteri, Giacomo Scelba, A. Testa
Abstract
A new dual T-type 13-level inverter topology is presented in this article, featuring less power switches, gate drivers, and diodes, than inverters based on traditional multilevel topologies, such as neutral point clamped, flying capacitor, T-type and cascaded H-bridge, or previously proposed reduced switch count 13-level inverter topologies. Moreover, no additional circuits are required to equalize the voltage of capacitors present in each pole, nor complex modulation strategies, leading to a reduction of cost and power losses. Exploiting a nearest level modulation technique, the proposed topology performs well in terms of efficiency and total harmonic distortion, as confirmed by experimental tests.