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High-Performance Short-Channel Top-Gate Indium-Tin-Oxide Transistors by Optimized Gate Dielectric

Chengru Gu, Qianlan Hu, Shenwu Zhu, Qijun Li, Min Zeng, Honggang Liu, Jiyang Kang, Shiyuan Liu, Yanqing Wu

2023IEEE Electron Device Letters23 citationsDOI

Abstract

In this work, high-performance top-gate indium-tin-oxide (ITO) transistors with high carrier mobility of 60 cm2/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{V}\cdot \text{s}$ </tex-math></inline-formula> have been successfully demonstrated using optimized atomic layer deposited (ALD) La-doped HfO2 as the top-gate dielectric. The scaled device with a channel length of 50 nm exhibits a high current on/off ratio over <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${7} \times {10} ^{{9}}$ </tex-math></inline-formula> owing to the excellent electrostatic control. A maximum output current of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1680~\mu \text{A}/\mu \text{m}$ </tex-math></inline-formula> with a remarkable carrier velocity of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${0}.{87} \times {10} ^{{7}}$ </tex-math></inline-formula> cm/s has also been achieved due to the record low contact resistance of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$180~\Omega \cdot \mu \text{m}$ </tex-math></inline-formula> . The on- and off-state performance of our ITO transistors are the highest among previous top-gate amorphous oxide semiconductors.

Topics & Concepts

NotationIndium tin oxideMaterials sciencePhysicsAlgorithmMathematicsNanotechnologyArithmeticLayer (electronics)Semiconductor materials and devicesAdvancements in Semiconductor Devices and Circuit DesignFerroelectric and Negative Capacitance Devices
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