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Clock Synchronization Algorithms Over PTP-Unaware Networks: Reproducible Comparison Using an FPGA Testbed

Igor Freire, Camila Novaes, Igor Almeida, Eduardo Medeiros, Miguel Berg, Aldebaro Klautau

2021IEEE Access22 citationsDOIOpen Access PDF

Abstract

This work explores clock synchronization algorithms used to process timestamps from the IEEE 1588 precision time protocol (PTP). It focuses on the PTP-unaware network scenario, where the network nodes do not actively contribute to PTP's operation. This scenario typically imposes a harsh environment for accurate clock distribution, primarily due to the packet delay variation experienced by PTP packets. In this context, it is essential to process the noisy PTP measurements using algorithms and strategies that consider the underlying clock and packet delay models. This work surveys some attractive algorithms and introduces an open-source analysis library that combines several of them for better performance. It also provides an unprecedented comparison of the algorithms based on datasets acquired from a sophisticated testbed composed of field-programmable gate arrays (FPGAs). The investigation provides insights regarding the synchronization performance under various scenarios of background traffic and oscillator stability.

Topics & Concepts

Computer scienceTestbedClock synchronizationField-programmable gate arraySynchronization (alternating current)Network packetContext (archaeology)TimestampProcess (computing)AlgorithmReal-time computingEmbedded systemComputer networkChannel (broadcasting)Operating systemPaleontologyBiologyNetwork Time Synchronization TechnologiesAdvancements in PLL and VCO TechnologiesReal-Time Systems Scheduling
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