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Improved Reliability for Back-End-of-Line Compatible Ferroelectric Capacitor With 3 Bits/Cell Storage Capability by Interface Engineering and Post Deposition Annealing

Hao‐Kai Peng, Ting-Chieh Lai, Yu‐Cheng Kao, Chia-Ming Liu, Pin‐Jiun Wu, Yung‐Hsien Wu

2022IEEE Electron Device Letters26 citationsDOI

Abstract

AlON/HfZrOx (HZO)/HfO2 stack with post-deposition annealing (PDA) process at 400 °C is proposed to implement BEOL compatible ferroelectric (FE) capacitors. While interface engineering by AlON and HfO2 enhances <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{P}_{\text {r}}$ </tex-math></inline-formula> to enable more bits storage, PDA reduces oxygen vacancies in the HZO by eliminating the reaction between HZO and top electrode. The FE capacitors display wake-up free behavior and the first reported 3 bits/cell operation with 8 stable states up to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{^{^{}}}~10^{{8}}$ </tex-math></inline-formula> cycles (±4 V/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1~\mu \text{s}$ </tex-math></inline-formula> ), non-overlapped cycle-to-cycle and device-to-device variation ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sigma &lt; 0.4~\mu \text{C}$ </tex-math></inline-formula> /cm2), outperforming other FE capacitors and demonstrating high potential for high-density embedded ferroelectric random-access memory (FeRAM).

Topics & Concepts

CapacitorFerroelectricityAnnealing (glass)Materials scienceMathematicsPhysicsOptoelectronicsDielectricQuantum mechanicsVoltageComposite materialFerroelectric and Negative Capacitance DevicesAdvanced Memory and Neural ComputingSemiconductor materials and devices
Improved Reliability for Back-End-of-Line Compatible Ferroelectric Capacitor With 3 Bits/Cell Storage Capability by Interface Engineering and Post Deposition Annealing | Litcius