Complementary photonic crystal integrated logic devices
Luis Pedraza Caballero, Michelle L. Povinelli, Jhonattan C. Ramírez, P. S. S. Guimãraes, Omar P. Vilela Neto
Abstract
We theoretically propose and demonstrate through numerous simulations complementary photonic crystal integrated logic (CPCL) devices. Simulation results provide demonstration of a highly efficient clock rate, higher than 20 GHz, guaranteeing operation at both input and output with the same wavelength (around <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML" display="inline"> <mml:mi>λ</mml:mi> <mml:mo>=</mml:mo> <mml:mn>1550</mml:mn> <mml:mspace width="thickmathspace"/> <mml:mrow class="MJX-TeXAtom-ORD"> <mml:mi mathvariant="normal">n</mml:mi> <mml:mi mathvariant="normal">m</mml:mi> </mml:mrow> </mml:math> ). The proposed devices show well-defined output power values representing the two logic states 1 and 0, with a contrast ratio as high as 6 dB. The results presented here provide countless possibilities for future research, targeting the development of photonic crystal logic and communications systems with CPCLs acting as the core hardware devices.