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Circuit Knitting With Classical Communication

Christophe Piveteau, David Sutter

2023IEEE Transactions on Information Theory101 citationsDOI

Abstract

The scarcity of qubits is a major obstacle to the practical usage of quantum computers in the near future. To circumvent this problem, various circuit knitting techniques have been developed to partition large quantum circuits into subcircuits that fit on smaller devices, at the cost of a simulation overhead. In this work, we study a particular method of circuit knitting based on quasiprobability simulation of nonlocal gates with operations that act locally on the subcircuits. We investigate whether classical communication between these local quantum computers can help. We provide a positive answer by showing that for circuits containing <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$n$ </tex-math></inline-formula> nonlocal CNOT gates connecting two circuit parts, the simulation overhead can be reduced from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$O(9^{n})$ </tex-math></inline-formula> to <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$O(4^{n})$ </tex-math></inline-formula> if one allows for classical information exchange. Similar improvements can be obtained for general Clifford gates and, at least in a restricted form, for other gates such as controlled rotation gates.

Topics & Concepts

Controlled NOT gateQuantum circuitQuantum computerComputer scienceElectronic circuitOverhead (engineering)QubitQuantum gateLogic gateAdderToffoli gateQuantumTopology (electrical circuits)Electronic engineeringTheoretical computer scienceAlgorithmQuantum error correctionElectrical engineeringQuantum mechanicsTelecommunicationsEngineeringPhysicsLatency (audio)Operating systemQuantum Computing Algorithms and ArchitectureComputability, Logic, AI AlgorithmsLow-power high-performance VLSI design
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