Leakage Reduction in 18 nm FinFET based 7T SRAM Cell using Self Controllable Voltage Level Technique
T. Santosh Kumar, Suman Lata Tripathi
Topics & Concepts
Leakage powerLeakage (economics)Static random-access memoryCMOSVoltageComputer scienceElectrical engineeringThreshold voltageElectronic engineeringMaterials scienceTransistorEngineeringEconomicsMacroeconomicsLow-power high-performance VLSI designAdvancements in Semiconductor Devices and Circuit DesignSemiconductor materials and devices