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Simulation-Based Analysis of Power, Hardware, and Temperature Constraints in 4-Bit Full Adder Circuits for High-Speed Data Processing

Gurdeep Singh, Amanpreet Kaur, Vaneeta Bhardwaj

202418 citationsDOI

Abstract

Energy shortage is currently a serious problem in many developing countries. An energy-efficient 4-bit full adder that uses multiple FPGA families and the Xilinx Vivado software framework has been developed, leading to the evolution of environmentally conscious communication. Xilinx Vivado is used in the study to implement an energy-efficient design for communication devices with an emphasis on controlling temperature, power dissipation, and energy consumption. The suggested design combines effective hardware utilization with power-saving strategies to provide maximum energy efficiency. The study also looks into how temperature affects circuit performance and reliability, demonstrating the benefits and viability of energy-efficient design for communication hardware circuits. Energy conservation is achieved through this while comparing with the Virtex and Zynq board.

Topics & Concepts

AdderComputer scienceBit (key)Electronic circuitPower (physics)Computer hardware16-bitElectronic engineeringArithmeticElectrical engineeringEngineeringTelecommunicationsLatency (audio)PhysicsComputer securityQuantum mechanicsMathematicsLow-power high-performance VLSI designParallel Computing and Optimization TechniquesVLSI and Analog Circuit Testing
Simulation-Based Analysis of Power, Hardware, and Temperature Constraints in 4-Bit Full Adder Circuits for High-Speed Data Processing | Litcius