Silicon‐Compatible Ferroelectric Tunnel Junctions with a SiO<sub>2</sub>/Hf<sub>0.5</sub>Zr<sub>0.5</sub>O<sub>2</sub> Composite Barrier as Low‐Voltage and Ultra‐High‐Speed Memristors
He Wang, Zeyu Guan, Jiachen Li, Zhen Luo, Xinzhe Du, Zijian Wang, Haoyu Zhao, Shengchun Shen, Yuewei Yin, Xiaoguang Li
Abstract
Abstract The big data era requires ultrafast, low‐power, and silicon‐compatible materials and devices for information storage and processing. Here, ferroelectric tunnel junctions (FTJs) based on SiO 2 /Hf 0.5 Zr 0.5 O 2 composite barrier and both conducting electrodes are designed and fabricated on Si substrates. The FTJ achieves the fastest write speed of 500 ps under 5 V (2 orders of magnitude faster than reported silicon‐compatible FTJs) or 10 ns speed at a low voltage of 1.5 V (the lowest voltage among FTJs at similar speeds), low write current density of 1.3 × 10 4 A cm −2 , 8 discrete states, good retention > 10 5 s at 85 °C, and endurance > 10 7 . In addition, it provides a large read current (88 A cm −2 ) at 0.1 V, 2 orders of magnitude larger than reported FTJs. Interestingly, in FTJ‐based synapses, gradually tunable conductance states (128 states) with high linearity (<1) are obtained by 10 ns pulses of <1.2 V, and a high accuracy of 91.8% in recognizing fashion product images is achieved by online neural network simulations. These results highlight that silicon‐compatible HfO 2 ‐based FTJs are promising for high‐performance nonvolatile memories and electrical synapses.