Optimized Device Geometry of Normally-On Field-Plate AlGaN/GaN High Electron Mobility Transistors for High Breakdown Performance Using TCAD Simulation
Sakhone Pharkphoumy, V. Janardhanam, Taehoon Jang, Jae-Jun Park, Kyu-Hwan Shim, Chel‐Jong Choi
Abstract
This study presents the optimization of the lateral device geometry and thickness of the channel and barrier layers of AlGaN/GaN high electron mobility transistors (HEMTs) for the enhancement of breakdown voltage (VBR) characteristics using a TCAD simulation. The effect of device geometry on the device performance was explored by varying the device design parameters, such as the field plate length (LFP), gate-to-drain length (LGD), gate-to-source length (LGS), gate length (LG), thickness of the Si3N4 passivation layer (Tox), thickness of the GaN channel (Tch), and AlGaN barrier (Tbarrier). The VBR was estimated from the off-state drain current versus the drain voltage (IDS–VDS) curve, and it exhibited a strong dependence on the length and thickness of the parameters. The optimum values of VBR for all the device’s geometrical parameters were evaluated, based on which, an optimized device geometry of the field-plated AlGaN/GaN HEMT structure was proposed. The optimized AlGaN/GaN HEMT structure exhibited VBR = 970 V at IGS = 0.14 A/mm, which was considerably higher than the results obtained in previous studies. The results obtained in this study could provide vital information for the selection of the device geometry for the implementation of HEMT structures.