Litcius/Paper detail

Speed, power and area efficient 2D FIR digital filter using vedic multiplier with predictor and reusable logic

V. Dyana Christilda, A. Milton

2021Analog Integrated Circuits and Signal Processing36 citationsDOI

Topics & Concepts

Multiplier (economics)Finite impulse responseDigital filterField-programmable gate arrayArithmeticDigital signal processingVerilogMathematicsCascaded integrator–comb filterFilter (signal processing)Computer scienceHalf-band filterAdderAlgorithmElectronic engineeringComputer hardwareRoot-raised-cosine filterCMOSEngineeringComputer visionMacroeconomicsEconomicsAnalog and Mixed-Signal Circuit DesignLow-power high-performance VLSI designDigital Filter Design and Implementation
Speed, power and area efficient 2D FIR digital filter using vedic multiplier with predictor and reusable logic | Litcius