An Analysis of Components and Enhancement Strategies for Advancing Memristive Neural Networks
Hyungjun Park, Joon‐Kyu Han, Seongpil Yim, Dong Hoon Shin, T. Park, T. Park, Kyung Seok Woo, Soo Hyung Lee, Jae Min Cho, Hyun Wook Kim, Taegyun Park, Taegyun Park, Cheol Seong Hwang
Abstract
Advancements in artificial intelligence (AI) and big data have highlighted the limitations of traditional von Neumann architectures, such as excessive power consumption and limited performance improvement with increasing parameter numbers. These challenges are significant for edge devices requiring higher energy and area efficiency. Recently, many reports on memristor-based neural networks (Mem-NN) using resistive switching memory have shown efficient computing performance with a low power requirement. Even further performance optimization can be made using engineering resistive switching mechanisms. Nevertheless, systematic reviews that address the circuit-to-material aspects of Mem-NNs, including their dedicated algorithms, remain limited. This review first categorizes the memristor-based neural networks into three components: pre-processing units, processing units, and learning algorithms. Then, the optimization methods to improve integration and operational reliability are discussed across materials, devices, circuits, and algorithms for each component. Furthermore, the review compares recent advancements in chip-level neuromorphic hardware with conventional systems, including graphic processing units. The ongoing challenges and future directions in the field are discussed, highlighting the research to enhance the functionality and reliability of Mem-NNs.